1. Field of the Invention
The present invention relates to a semiconductor process. More particularly, the present invention relates to a method for preventing damages to the isolation structure and methods of fabricating semiconductor devices and memory devices.
2. Description of Related Art
As the device dimension gradually reduces and the level of integration steadily increases, the size of the isolation structure between devices also reduces. Accordingly, the level of difficulties in the device isolation technology magnifies. In the current device isolation technology, the shallow trench isolation (STI) structure can be formed in various sizes. Further, the deficiency of a bird's beak formation as in the conventional local oxidation isolation technology can be avoided. Therefore, the STI technology is preferred for the sub 0.5 micron metal oxide semiconductor process.
FIGS. 1A to 1B are schematic cross-sectional views showing the steps for fabricating a shallow trench isolation structure according to the prior art. Referring to FIG. 1A, a patterned mask layer 102 is formed on the substrate 100. With the patterned mask layer 102 serving as an etching mask, the substrate 100 is etched to form a trench 104 therein. An insulation layer 106 then fills the trench 104. Referring to FIG. 1B, a chemical mechanical polishing process is performed to remove the insulation layer 106 outside the trench 104. Thereafter, the patterned mask layer 102 is removed, and a shallow trench isolation structure 108 is resulted.
In general, the fabrication of the shallow trench isolation structure is completed before a related device manufacturing process is being performed. The formation of the shallow trench isolation structure 108 defines the active region 110 on the substrate 100. Thereafter, the fabrication of the semiconductor device or the memory device can be conducted. It is worthy to note that a cleaning process is an essential process in the subsequent fabrication process of a semiconductor device or a memory device. However, each cleaning may incur damages to a part of the shallow trench isolation structure 108. More particularly, re-entrant (as shown in FIGS. 2 and 3) is formed near the top corner of the trench 104. The damages incurred, besides potentially affecting the isolation effect of the shallow trench isolation structure 108, residues from the materials of the semiconductor device or the memory device may fill the re-entrant 112. When the residues filling the re-entrant 112 are conductive, the neighboring semiconductor devices or memory devices are bridged, short circuiting the semiconductor devices or the memory devices.